Zurich, Switzerland
Full-time
About Chipmind
Chipmind is a Zurich-based deep-tech company developing AI-powered solutions for semiconductor design and Electronic Design Automation (EDA).
Its technology uses autonomous AI agents to accelerate and automate complex chip design processes, including RTL development, verification, simulation, synthesis and debugging.
The team is looking for a Digital Chip Design Engineer who combines practical silicon engineering expertise with an interest in AI-driven chip design automation.
Key Responsibilities
- Design, develop and optimise digital ASIC/SoC components using SystemVerilog and Verilog.
- Apply hands-on silicon engineering expertise across RTL development, synthesis, verification and implementation.
- Work with complex digital architectures, processor subsystems and RISC-V-related designs.
- Address clock domain crossing (CDC), timing constraints, design integration and optimisation.
- Work with Synopsys, Cadence and open-source EDA tools such as Verilator, Yosys and OpenROAD.
- Develop and validate real-world semiconductor design workflows for Chipmind's autonomous AI agents.
- Collaborate with AI researchers and software engineers to advance automated chip design, debugging and verification.
- Support performance, power and area (PPA) optimisation.
- Collaborate with EuroCDU as part of the role, contributing semiconductor design expertise to joint technical activities and engineering workflows.
Required Skills & Experience
- 3+ years of hands-on digital ASIC, SoC or RTL design experience.
- Strong SystemVerilog / Verilog expertise.
- Understanding of silicon design and RTL-to-GDSII workflows.
- Experience with synthesis, simulation, static timing analysis and CDC.
- Familiarity with Synopsys and/or Cadence EDA environments.
- Python scripting and Linux development experience.
- Degree in Electrical Engineering, Microelectronics, Computer Engineering or equivalent practical experience.
Additional Experience of Interest
- RISC-V processor architecture and CPU microarchitecture.
- ASIC physical design, place-and-route and silicon tape-out.
- Complex FPGA/RTL design transferable to ASIC development.
- SoC integration, AXI/AMBA protocols and digital IP.
- Formal verification, UVM and design automation.
- AI-assisted engineering or autonomous agent technologies.
Why Join Chipmind?
- Work at the intersection of AI, silicon engineering and semiconductor innovation.
- Help develop next-generation AI tools used by chip design engineers.
- Contribute to challenging ASIC/SoC and EDA automation projects.
- Gain exposure to collaborative engineering work involving EuroCDP.
- Join a growing deep-tech company where your technical input can directly influence product development.
- Competitive base salary plus equity participation.
