About Chipmind
Chipmind is a Zurich-based AI-native company, transforming chip development with Agentic AI that automates design and verification by solving real-world tasks, accelerating the path from code to chip. We're looking for a Digital Chip Design Engineer who has shipped silicon and will help build and refine the evaluation and reward environments that power our agents.
What you’ll do
- Design and optimise digital ASIC/SoC blocks in SystemVerilog and Verilog.
- Own pieces of the RTL-to-implementation flow: synthesis, timing, CDC, integration and PPA.
- Solve real design tasks that we use to train, test and evaluate our agents. You’ll be one of the people who keeps the agents trustworthy.
- Contribute to our RL-ready environments and reward signals (coverage, functional checks, PPA signals) that steer and score agent behaviour in complex SoCs.
- Work closely with the AI and software engineers to figure out where the agents help and where they still get in the way.
- Contribute to our collaboration with EuroCDP on selected engineering activities.
What we’re looking for
- 3+ years of hands-on digital ASIC, SoC or RTL work.
- Strong SystemVerilog / Verilog skills and a practical understanding of how designs actually go from RTL to GDSII.
- Experience with synthesis, simulation, STA and CDC.
- Comfortable in Linux and able to write Python when needed.
- Degree in EE, Microelectronics, Computer Engineering or equivalent experience.
Nice to have
- Experience with reward-guided environments or evaluation harnesses for chip design and verification agents.
- RISC-V architecture or microarchitecture experience.
- Place-and-route, physical design or tape-out experience.
- SoC integration, AXI/AMBA or other on-chip protocols.
- Formal verification or UVM.
- Any prior exposure to AI-assisted engineering workflows.
Why this role
You’ll work at the point where real silicon engineering meets AI agent systems. Your work will directly shape the product, and you’ll get visibility into how EuroCDP and European chip design initiatives are evolving. Competitive salary plus equity.
